Kioxia and Western Digital have announced 3D NAND flash memory chips with 218 layers and a capacity of 1 Tbps. According to the developers, the chips have the highest bit density in the industry. Samples of new products have already been received by a small group of clients of the companies for research.
The eighth generation of BiCS FLASH Kioxia and Western Digital will open chips with more than 300 layers. Partners use "gluing" of crystals to increase the number of layers, while in the case of new products, the cell array and controller are also manufactured separately and are also assembled into a vertical stack in the "gluing" process.
Kioxia and Western Digital first created controllers as part of cell arrays, but the first to produce a control chip separately was the Chinese company YMTC in the form of Xtacking technology. CBA is a "innovative technology" that involves making controllers and cell arrays on separate wafers with optimization of each process, and being combined only after completion.
Due to parallelism, the cell array is still used "four-plane." This allowed you to increase memory speed by 50% when the arrays were "shrunk" vertically and horizontally. Moreover, memory performance has increased by 60% in comparison to the previous generation of chips.
The write speed is also reduced by 20% or so. This will also have a positive impact on the performance of Kioxia and Western Digital's new 3D NAND chips.
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